Senior Principal Electrical Digital Engineer – FPGA Lead

RTX; Miami (FL); On-site; USD 132,000 - 252,000; Full time

Benefits offered by this job

Relocation support

Benefits package

Career growth opportunities

Job summary

RTX is seeking an Electrical Subsystems Digital Senior Principal Engineer in Tucson to lead digital design efforts for guidance systems with FPGA components. You will own program execution, coordinate with customers and suppliers, and guide technical choices across the development lifecycle.

The role requires a STEM degree and 10+ years in analog/digital/power electronics, subsystem architecture, and CCA design. DoD Secret clearance eligibility and a willingness to travel ~25% are required.

Qualifications

• Bachelor’s degree in Science, Technology, Engineering or Mathematics (STEM).
• Minimum 10 years of relevant experience in analog, digital, and power electronics design and integration.
• Experience in digital subsystems, systems engineering, and requirement development.
• Experience with CCA design, digital test integration, and supplier management.
• Active and transferable U.S. government issued Secret security clearance is required.

Responsibilities

• Lead digital design efforts for development guidance systems featuring FPGAs.
• Own program execution including cost, schedule and technical oversight.
• Support component design reviews and testing processes.
• Mentor and collaborate with peers, management, and customers.
• Travel up to ~25% may be required.
• Architect new electronic systems and document subsystem requirements.

Skills

Digital design

FPGA

System integration

Leadership

Program management

Education

Bachelor's degree in STEM

Tools

Schematic Capture

Interconnect Design

Job description

RTX is seeking an Electrical Subsystems Digital Senior Principal Engineer in Tucson to lead digital design efforts for guidance systems with FPGA components. You will own program execution, coordinate with customers and suppliers, and guide technical choices across the development lifecycle.

The role requires a STEM degree and 10+ years in analog/digital/power electronics, subsystem architecture, and CCA design. DoD Secret clearance eligibility and a willingness to travel ~25% are required.