Senior Packaging Engineer: SI/PI for High-Speed ATE

Teradyne; North Reading (MA); On-site; USD 175,000 - 281,000; Full time

Job summary

Teradyne is seeking a Package Design Engineer with signal and power integrity experience to support advanced measurement ASIC products within the Semiconductor Test Division. This role contributes to the physical realization of complex RF, analog, digital, and mixed-signal ASIC products across chip, package, board, socket, fixture, and system interconnect environments.

You will provide technical direction for package electrical integrity strategy, create constraints, review designs with

Qualifications

• Master's degree in Electrical Engineering or Packaging Engineering or equivalent.
• Extensive semiconductor package design experience and interconnect modeling.
• Experience leading SI/PI design and signoff for high-speed interconnects.
• Strong knowledge of electromagnetic field theory and high-speed signaling.
• Experience with Cadence tool flows and package-to-board co-design.
• Hands-on use of VNA, TDR/TDT, high-speed scopes, and test fixtures.

Responsibilities

• Lead ASIC package signal and power integrity architecture and constraints.
• Collaborate across ASIC, PCB, mechanical, thermal, and supplier teams.
• Develop models for package/board interconnects and drive hardware correlation.
• Mentor engineers and reviewers in SI/PI methods and documentation.

Skills

SI/PI analysis

Electromagnetic theory

High-speed signaling

Design-for-manufacture

Education

Master's degree in Electrical Engineering or Packaging Engineering

PhD or equivalent advanced technical experience preferred

Tools

Cadence Sigrity

Clarity

Allegro/APD

Integrity/System Planner

Celsius

Allegro X/Aurora

Job description

Teradyne is seeking a Package Design Engineer with signal and power integrity experience to support advanced measurement ASIC products within the Semiconductor Test Division. This role contributes to the physical realization of complex RF, analog, digital, and mixed-signal ASIC products across chip, package, board, socket, fixture, and system interconnect environments.

You will provide technical direction for package electrical integrity strategy, create constraints, review designs with