Senior Packaging Engineer - SI/PI for High-Speed ASICs

LitePoint; North Reading (MA); On-site; USD 175,000 - 281,000; Full time

Benefits offered by this job

Health and wellness benefits

Paid vacation & holidays

Tuition assistance programs

Job summary

Teradyne seeks a Package Design Engineer with signal and power integrity expertise to support advanced ASIC products. You will guide package electrical integrity, constraints, and supplier design reviews across chip, package, board, socket, fixture, and system interconnects.

Lead SI/PI architecture, develop constraints, and collaborate with multi-disciplinary teams to optimize performance, manufacturability, and reliability in high‑performance mixed-signal environments.

Qualifications

• Master's degree required in Electrical/Packaging field; PhD preferred.
• Extensive semiconductor package design experience.
• Experience leading SI/PI design and signoff for high-speed interconnects.

Responsibilities

• Define package SI/PI architecture and stackup strategy.
• Create package/PCB constraints for high-speed links and IO.
• Collaborate with ASIC, PCB, mechanical, thermal, and suppliers.
• Build time-domain and frequency-domain models for interconnects.
• Support package-level PDN planning and impedance targets.
• Evaluate design-for-manufacture/assembly with suppliers.
• Mentor engineers in package design methods and SI/PI workflows.

Skills

Semiconductor SI/PI expertise

High-speed interconnect design

Electromagnetic theory knowledge

Analytical modeling (TD/FD)

Strong communication & collaboration

Programming for data processing

Education

Master's degree in Electrical/Packaging Engineering

PhD or advanced experience preferred

Tools

Cadence Sigrity

Clarity

Allegro/APD

Integrity/System Planner

Celsius

Allegro X/Aurora

Job description

Teradyne seeks a Package Design Engineer with signal and power integrity expertise to support advanced ASIC products. You will guide package electrical integrity, constraints, and supplier design reviews across chip, package, board, socket, fixture, and system interconnects.

Lead SI/PI architecture, develop constraints, and collaborate with multi-disciplinary teams to optimize performance, manufacturability, and reliability in high‑performance mixed-signal environments.