Senior Packaging Engineer, Hardware Packaging (Equity)

Nvidia Corporation in; Santa Clara (CA); On-site; USD 168,000 - 322,000; Full time

Benefits offered by this job

Equity

Job summary

NVIDIA is seeking a Senior Packaging Technical Engineer to define and implement chip pad rings, substrate interconnect schemes, and lead the package layout design process. You will collaborate with circuit, SI, RTL, P&R, substrate layout and system design teams to deliver a robust, world-class electrical package.

Ideal candidates have 8+ years in board/system design (package design preferred) with strong SI knowledge, transmission line theory, and power delivery.

Qualifications

• BSEE or equivalent required.
• Minimum 8+ years in board/system design; package design preferred.
• Solid understanding of transmission line theory, power delivery and signal integrity.
• Programming/scripting knowledge in Perl, Python and Tcl; Cadence and Excel helpful.

Responsibilities

• Define and implement chip pad ring, substrate interconnect scheme, and lead package layout design process.
• Collaborate with large teams including Circuit, SI, RTL, Place & Route, substrate layout and system design engineers and managers.

Skills

Board/system design

Transmission line theory

Power delivery

Signal integrity

Python

Perl

Tcl

Excel

Education

BSEE or equivalent

Tools

Cadence

Job description

NVIDIA is seeking a Senior Packaging Technical Engineer to define and implement chip pad rings, substrate interconnect schemes, and lead the package layout design process. You will collaborate with circuit, SI, RTL, P&R, substrate layout and system design teams to deliver a robust, world-class electrical package.

Ideal candidates have 8+ years in board/system design (package design preferred) with strong SI knowledge, transmission line theory, and power delivery.