Senior Package & Substrate Design Engineer

Touchdown Labs; Santa Clara (CA); Hybrid; USD 150,000 - 200,000; Full time

Job summary

Touchdown Labs is seeking a Package Design & Substrate Engineer to drive substrate stack-up, routing, and thermal integrity for high-speed compute chips. You will work closely with chip, system, and supplier teams to ensure robust packaging and testability in a fast-paced environment.

The role requires 7+ years in package/substrate design, SI/PI and thermal simulation experience, and proficiency with Cadence APD/SiP or Ansys.

Qualifications

• Must have 7+ years in package or substrate design.
• Experience with SI/PI and thermal simulation.
• Proficiency with Cadence APD/SiP or Ansys tools.
• Ability to collaborate with chip, system, and supplier engineers.

Responsibilities

• Own substrate and interposer stack-up.
• Perform signal, power, and thermal checks.
• Publish design rules for integration and test.

Skills

Package design

Substrate design

Signal integrity

Thermal analysis

Tools

Cadence APD/SiP

Ansys

Job description

Touchdown Labs is seeking a Package Design & Substrate Engineer to drive substrate stack-up, routing, and thermal integrity for high-speed compute chips. You will work closely with chip, system, and supplier teams to ensure robust packaging and testability in a fast-paced environment.

The role requires 7+ years in package/substrate design, SI/PI and thermal simulation experience, and proficiency with Cadence APD/SiP or Ansys.