Senior Substrate Designer

Elevate Semiconductor; San Diego (CA); On-site; USD 115,000 - 130,000; Full time

Benefits offered by this job

Unlimited Paid Time Off

Performance Bonuses

Free Lunch Catered in by Local Restaurants

Private Equity Options

Retirement Plans

Sabbatical Program

Tuition Reimbursement

Relocation Assistance

Conference Attendance Support

Biweekly Phone Stipend

Employee Assistance Program

Job summary

A leading semiconductor company in San Diego is seeking an experienced Senior Substrate Designer to develop advanced IC packaging solutions. You will create high-performance substrate designs, collaborate cross-functionally, and conduct analyses to validate performance. The ideal candidate holds a Bachelor’s degree in a related field and has over 5 years of experience in substrate design. A competitive salary range of $115,000 to $130,000 is offered, along with various benefits including unlimited paid time off and performance bonuses.

Qualifications

• 5+ years of experience in substrate design or advanced IC packaging.
• Strong expertise with substrate CAD tools such as Cadence Allegro or equivalent.
• Deep understanding of high speed routing and manufacturing constraints.

Responsibilities

• Create complex multi layer substrate designs for high speed mixed signal and power ICs.
• Partner with IC design teams to understand die level requirements and translate them to substrate architecture.
• Define substrate design guidelines and conduct design reviews.

Skills

Substrate design

Signal integrity

Power integrity

High-speed routing

Collaboration

Education

Bachelor’s degree in electrical engineering

Bachelor’s degree in Mechanical Engineering

Bachelor’s degree in Materials Engineering

Tools

Cadence Allegro

Job description

At Elevate Semiconductor, we empower semiconductor and system test customers by creating world-class ICs that tackle the industry’s most complex automated test equipment (ATE) challenges. Our innovative team designs the lowest‑power, highest‑density solutions to drive down cost of test while pushing performance forward.

We are seeking an experienced Senior Substrate Designer to support the development of advanced IC packaging solutions. In this role, you will design high performance substrates that enable next generation semiconductor products. You will work closely with design engineering test engineering and operations teams to ensure high quality manufacturable solutions that meet electrical mechanical and thermal requirements.

Although our goal is to hire someone full time, we are open to considering consultant based project work given the nature of the responsibilities.

Key Responsibilities

Substrate Design and Layout

• Create complex multi layer substrate designs for high speed mixed signal and power ICs
• Develop detailed layout including routing stackups via structures and design rules
• Optimize layouts for signal integrity power integrity and thermal performance

Cross Functional Collaboration

• Partner with IC design teams to understand die level requirements and translate them to substrate architecture
• Work with packaging operations suppliers and manufacturing partners to ensure design feasibility and high yield
• Collaborate with test and product engineering to support bring up qualification and debug

Technical Ownership

• Define substrate design guidelines standards and best practices
• Conduct design reviews and provide expert guidance on tradeoffs and constraints
• Create and maintain documentation including drawings BOMs and release files

Analysis and Validation

• Perform signal integrity power integrity and thermal simulations as needed
• Validate layout decisions with modeling and characterization data
• Support root cause analysis for substrate related issues in development and production

Required Qualifications

• Bachelor’s degree in electrical engineering, Mechanical Engineering, Materials Engineering or related field
• 5+ years of experience in substrate design or advanced IC packaging
• Strong expertise with substrate CAD tools such as Cadence Allegro or equivalent
• Deep understanding of high speed routing impedance control stackup design via structures and manufacturing constraints
• Knowledge of SI and PI fundamentals including loss crosstalk return paths and decoupling strategies
• Experience working with OSATs and substrate vendors

Preferred Qualifications

• Experience with advanced packaging technologies such as flip chip 2.5D 3D or chiplet architectures
• Familiarity with thermal modeling and materials selection
• Strong documentation and communication skills
• Ability to work effectively in a fast paced collaborative environment
• Unlimited Paid Time Off
• Performance Bonuses
• Free Lunch Catered in by Local Restaurants
• Private Equity Options
• Retirement Plans
• Sabbatical Program
• Tuition Reimbursement
• Relocation Assistance
• Conference Attendance Support
• Biweekly Phone Stipend
• Employee Assistance Program

The salary range for this role is $115,000.00-$130,000.00. The final compensation will depend on your experience, skill set, and how well you’re able to highlight your background throughout the interview process.