Senior Lead FPGA/SoC Design Architect

Altera; San Jose (CA); On-site; USD 232,000 - 330,000; Full time

Job summary

Altera is seeking a Senior Lead Design Engineer to provide hands-on technical leadership for FPGA and programmable SoC architectures, delivering next-generation solutions. This role blends design, verification, and cross‑functional collaboration across global teams to ensure architectural integrity and timely delivery.

You will own critical blocks, drive tradeoffs among performance, power, area, and latency, and mentor engineers while shaping technology direction, roadmap, and IP strategy.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline; 15+ years of relevant experience.
• Technical leadership delivering complex digital subsystems from architecture to hardware validation.
• Deep hands-on expertise in Verilog and SystemVerilog RTL design and timing considerations.
• Experience with high-performance digital architectures (networking, packet processing, PCIe/CXL, etc.).
• Strong tradeoff skills across performance, power, area, latency, and reliability.
• Experience leading design execution across multiple blocks and chip-level integration.
• Ability to collaborate and influence across architecture, RTL, verification, physical design, and product engineering.
• Excellent written and verbal communication for diverse audiences.

Responsibilities

• Lead architecture, microarchitecture, and RTL development for FPGA, SoC, and related subsystems.
• Define technical requirements, interfaces, and implementation plans aligned with product objectives.
• Drive tradeoffs on performance, power, area, latency, bandwidth, and reliability.
• Own critical blocks through RTL, synthesis, verification support, timing, and bring‑up.
• Establish reusable IP, coding standards, and automation to improve velocity and predictability.
• Collaborate with architecture, verification, CAD, firmware, software, and post‑silicon teams.
• Lead cross‑functional issue resolution, debugging, and technical decision making.
• Provide mentorship and design leadership across teams to raise engineering bar.

Skills

Verilog/SystemVerilog

HDL design leadership

High-performance digital architectures

Cross-functional collaboration

Mentorship/technical leadership

SoC/FPGA expertise

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline

Tools

Python

Tcl

Job description

Altera is seeking a Senior Lead Design Engineer to provide hands-on technical leadership for FPGA and programmable SoC architectures, delivering next-generation solutions. This role blends design, verification, and cross‑functional collaboration across global teams to ensure architectural integrity and timely delivery.

You will own critical blocks, drive tradeoffs among performance, power, area, and latency, and mentor engineers while shaping technology direction, roadmap, and IP strategy.