Senior SoC Architect & Design Lead

Altera Corporation; San Jose (CA); On-site; USD 232,000 - 330,000; Full time

Job summary

Altera Corporation, based in San Jose, California, seeks a Senior Lead Engineer, Design and Architecture to provide technical leadership for high-performance silicon and subsystem architectures. You will define microarchitectures, drive critical decisions, and guide RTL, verification, emulation, and post-silicon activities across AI, cloud, networking, and edge applications.

The role requires deep expertise in ASIC/SoC architecture, memory systems, high-bandwidth interconnect, and on-chip

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field; 15+ years of semiconductor/ASIC/SoC/FPGA product development.
• Experience delivering complex silicon architectures from concept to production including RTL, verification, integration, and post-silicon validation.
• Deep expertise in on-chip networks, memory hierarchy, cache coherency, high-performance datapaths, or infrastructure-class SoC design.

Responsibilities

• Define system, subsystem, and microarchitecture for complex SoC, ASIC, and FPGA-adjacent platforms with focus on interconnect, data movement, and memory systems.
• Lead architecture exploration and balance tradeoffs across performance, power, area, bandwidth, latency, reliability, scalability, cost, and schedule.
• Develop architectural specs, performance models, and plans aligning hardware, firmware, software, validation, and product teams.

Skills

Architecture leadership

SoC design

High-bandwidth interconnect

Memory hierarchy

Networking/DPU design

Education

Bachelor’s degree in Electrical/Computer Engineering, CS

Tools

SystemVerilog

RTL verification

Emulation

Python automation

Job description

Altera Corporation, based in San Jose, California, seeks a Senior Lead Engineer, Design and Architecture to provide technical leadership for high-performance silicon and subsystem architectures. You will define microarchitectures, drive critical decisions, and guide RTL, verification, emulation, and post-silicon activities across AI, cloud, networking, and edge applications.

The role requires deep expertise in ASIC/SoC architecture, memory systems, high-bandwidth interconnect, and on-chip