Senior IC Packaging Design Engineer — High-Performance Substrates

Tessolve

Chandler (AZ)

Vor Ort

USD 110.000 - 190.000

Vollzeit

Vor 5 Tagen
Sei unter den ersten Bewerbenden

Eine vollständige Bewerbung in einer Minute

Maßgeschneiderter Lebenslauf und Anschreiben – versandbereit.

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Benefits dieser Stelle

Engagement with leading semiconductor/
Cutting-edge packaging projects
Flexible location Chandler or Hillsbor

Zusammenfassung

Tessolve Semiconductors is hiring IC Packaging Design Engineers for Chandler, AZ (primary) or Hillsboro, OR (secondary). Senior candidates with 10+ years are preferred; mid-level (4–6+ MS / 6+ BS) are also considered.

You’ll design IC packages, drive substrate layout, and ensure reliability, manufacturability, and SI/PI-aware implementations. Join a leading semiconductor engineering firm and work on cutting-edge packaging projects with flexible location options in Chandler, AZ or Hillsboro, OR.

Qualifikationen

  • Requires 10+ years for senior or 4–6+ years MS / 6+ years BS for mid-level candidates.
  • Experience in IC packaging design and substrate layout.
  • Proven ability to implement SI/PI-aware designs and ensure DFM/DFY/DFR compliance.

Aufgaben

  • Perform physical design and layout of IC packages
  • Execute substrate design and layout
  • Design for performance, manufacturability, yield, and reliability (DFM/DFY/DFR)
  • Ensure design rule compliance across all deliverables
  • Use Siemens Xpedition or Cadence APD for design execution

Kenntnisse

IC packaging design
Siemens Xpedition
Cadence Allegro/APD
DFM/DFY/DFR
Substrate design

Ausbildung

Bachelor's or Master's in Electrical/Electronics Engineering

Tools

Siemens Xpedition
Cadence Allegro/APD

Jobbeschreibung

Tessolve Semiconductors is hiring IC Packaging Design Engineers for Chandler, AZ (primary) or Hillsboro, OR (secondary). Senior candidates with 10+ years are preferred; mid-level (4–6+ MS / 6+ BS) are also considered.

You’ll design IC packages, drive substrate layout, and ensure reliability, manufacturability, and SI/PI-aware implementations. Join a leading semiconductor engineering firm and work on cutting-edge packaging projects with flexible location options in Chandler, AZ or Hillsboro, OR.

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