IC Packaging Design Engineer

Anysilicon; Chandler (AZ); Hybrid; USD 90,000 - 130,000; Full time

Job summary

Scalable Systems in Chandler, AZ is seeking an IC Package Design Engineer to contribute to a new product development project, bringing expertise in packaging design and a strong background in electrical engineering.

You will design packaging solutions, ensure compliance with industry standards, and collaborate with cross-functional teams to optimize performance, manufacturability, yield and reliability.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering.
• Experience in IC packaging design is preferred.
• Knowledge of SI/PI aware design and design-for-manufacturability.

Responsibilities

• Design and implement IC packaging solutions for new products.
• Ensure design compliance with industry standards and specifications.
• Collaborate with cross-functional teams to optimize design for performance and manufacturability.
• Evaluate substrate design and layout with focus on yield and reliability.

Skills

Xpedition (Mentor)

Cadence Allegro/APD

IC Packaging design

Education

Bachelor’s or Master’s degree in Electrical/Electronics Engineering

Tools

Mentor Xpedition

Cadence Allegro APD/SIP

Job description

Scalable Systems, Chandler, AZ 85248 Hybrid work

Job Description:

We are seeking a highly skilled IC Package Design Engineer to contribute to a new product development project. This role requires expertise in IC packaging design and a strong background in electrical or electronics engineering.

Responsibilities:

• Design and implement IC packaging solutions for new products.
• Ensure design compliance with industry standards and specifications.
• Collaborate with cross-functional teams to optimize design for performance and manufacturability.
• Conduct substrate design and layout, focusing on SI/PI aware design implementation.
• Evaluate and enhance design for yield and reliability.

Qualifications:

• Bachelor’s or Master’s degree in Electrical/Electronics Engineering.

Skills:

• Strong hands‑on experience with Siemens (Mentor) Xpedition (XPD) or Cadence Allegro/Advanced Package Designer (APD/SIP).
• Expertise in physical design and layout.
• Knowledge of design rule compliance and best practices in IC packaging.