Senior IC Package Layout Engineer (2.5D/3D-IC)

Amazon Inc.; Cupertino (CA); On-site; USD 177,000 - 247,000; Full time

Benefits offered by this job

Health insurance

RSUs

401(k) matching

Paid time off

Parental leave

Job summary

Annapurna Labs, within AWS, seeks a Package Layout Design Engineer to help design advanced IC packages for next‑gen ML and data center ASICs. You will perform die floor planning, RDL/substrate routing, and interposer work, coordinating with ASIC teams and OSAT partners to deliver robust layouts.

You will also ensure design rules, DFM compliance, and impedance/electrical constraint integration across multi‑layer substrates, with collaboration across SI/PI teams in a dynamic environment in

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• Experience with debugging at multiple levels from IP to SoCs.
• Experience verifying across logic levels from IP to full system.

Responsibilities

• Execute package layout tasks across the design cycle including die floor planning and tape out release.
• Implement physical designs for 2.5D/3D-IC packaging and interposers.
• Support floorplan development with die placement, bump maps, and power/ground distribution.
• Perform RDL and substrate routing for high-density interconnects.
• Coordinate die-level RDL routing with ASIC teams for die-package interface.
• Contribute to cross-level layout co-optimization across die, interposer, and PCB levels.
• Maintain package stack-up definitions with SI/PI and materials teams.
• Run DRC and connectivity checks and support design closure.
• Refine design rules with OSAT partners and foundries for DFM compliance.
• Collaborate with SI/PI engineers to incorporate electrical constraints into layout.

Skills

IC package layout

Physical design

Debugging skills

Cadence APD/SiP

Synopsys IC Packaging

Mentor Xpedition

RDL routing

Interposer/substrate knowledge

DFM constraints

Electrical constraints integration

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical or Communications Engineering

Tools

Cadence APD/SiP

Synopsys IC Packaging

Mentor Xpedition

Job description

Annapurna Labs, within AWS, seeks a Package Layout Design Engineer to help design advanced IC packages for next‑gen ML and data center ASICs. You will perform die floor planning, RDL/substrate routing, and interposer work, coordinating with ASIC teams and OSAT partners to deliver robust layouts.

You will also ensure design rules, DFM compliance, and impedance/electrical constraint integration across multi‑layer substrates, with collaboration across SI/PI teams in a dynamic environment in