IC Package Layout Engineer — 2.5D/3D-IC Expert

Amazon Web Services (AWS); Illinois; On-site; USD 120,000 - 190,000; Full time

Job summary

Annapurna Labs Ltd. in the United States is seeking a Package Layout Design Engineer to advance the physical design of advanced IC packages for data center GPUs and ML accelerators.

You will lead die floor planning, RDL routing, and interposer packaging strategies, collaborating with ASIC teams, SI/PI, thermal, and manufacturing to deliver production-ready designs that meet performance, density, and reliability targets.

Qualifications

• 5+ years of IC package layout and physical design.
• Experience executing package designs from concept to tape-out.
• Hands-on with Cadence APD/SiP, Synopsys IC Packaging or Mentor Xpedition.
• Familiarity with 2.5D/3D-IC, fan-out WLP, RDL, TSVs.

Responsibilities

• Execute package layout tasks across the design cycle from floor planning to tape-out.
• Implement physical designs for 2.5D interposer, 3D-IC, and related packaging tech.
• Coordinate with ASIC teams, SI/PI, thermal, and manufacturing to meet targets.
• Run DRC and design rule checks and support design closure.
• Collaborate with OSATs and foundries to ensure DFM compliance.

Skills

Package layout

ASIC physical design

Debugging

Education

MS in Electrical Engineering

Tools

Cadence APD/SiP

Synopsys IC Packaging

Mentor Xpedition

Job description

Annapurna Labs Ltd. in the United States is seeking a Package Layout Design Engineer to advance the physical design of advanced IC packages for data center GPUs and ML accelerators.

You will lead die floor planning, RDL routing, and interposer packaging strategies, collaborating with ASIC teams, SI/PI, thermal, and manufacturing to deliver production-ready designs that meet performance, density, and reliability targets.