Senior IC Design Implementation & Signoff Architect

Cadence Design Systems; Salem (OR); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

Paid vacation

401(k) with match

Employee stock purchase plan

Medical/Dental/Vision plans

Job summary

Cadence Design Systems in Oregon is seeking a senior leader to drive timing signoff excellence across advanced nodes. You will lead technical engagements with customers, shape tool enhancements, and guide adoption of Cadence's signoff portfolio to meet stringent performance targets.

The role requires 15+ years in IC design, deep STA/ECO expertise, and strong leadership. We offer competitive compensation including incentive opportunities and comprehensive benefits.

Qualifications

• 15+ years of IC design implementation and signoff experience.
• Deep expertise in digital design fundamentals and advanced node STA/ECOs (3nm and below).
• Core timing signoff expertise and closure solutions.
• Proven track record leading technical teams and executive-level customer success.
• Proficient in scripting and flow customization (Tcl, Python, Perl).

Responsibilities

• Lead technical engagements with customers and partners to drive adoption of Cadence signoff portfolio.
• Collaborate with R&D and Product Engineering to influence tool enhancements.
• Drive benchmarks, flow optimizations, and deployment of timing signoff methodologies.
• Represent Cadence at industry forums and deliver technical papers/keynotes.
• Lead cross-functional teams and ensure customer success.

Job description

Cadence Design Systems in Oregon is seeking a senior leader to drive timing signoff excellence across advanced nodes. You will lead technical engagements with customers, shape tool enhancements, and guide adoption of Cadence's signoff portfolio to meet stringent performance targets.

The role requires 15+ years in IC design, deep STA/ECO expertise, and strong leadership. We offer competitive compensation including incentive opportunities and comprehensive benefits.