Senior STA Signoff Architect: Timing, Power & Innovation

Cadence; Austin (TX); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

Paid vacation

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plans

Job summary

Cadence seeks a senior IC design expert to lead large-scale signoff initiatives from Washington. You will guide complex timing, STA/ECOs, and flow optimizations while shaping customer engagements and tool enhancements. The role demands executive-level collaboration and industry thought leadership.

The ideal candidate has 15+ years in IC design, strong scripting ability, and a deep Cadence toolkit background. This full-time position offers competitive compensation and benefits.

Qualifications

• 15+ years of IC design implementation and signoff experience.
• Deep expertise in digital design fundamentals and advanced node STA/ECOs (3nm and below).
• Core timing signoff expertise and constraints debugging.
• Strong leadership and proven ability to drive large technical programs.
• Proficient in scripting (Tcl, Python, Perl) and design-closure workflows.
• Experience with Cadence tools (Tempus, Certus, QRC).
• BS/MS in Electrical/Computer Engineering or related field.

Responsibilities

• Lead technical engagements to drive adoption of Cadence signoff portfolio.
• Collaborate with R&D and Product Engineering to influence tool enhancements.
• Drive benchmarks, flow optimizations, and deployment for timing signoff, STA, IR Drop, and power/timing closure.
• Represent Cadence at industry forums, author technical papers, and deliver keynote presentations.

Skills

Digital design

Timing signoff

Scripting (Tcl, Python, Perl)

Leadership

Communication

Cadence tools

Education

BS in Electrical/Computer Engineering

MS in Electrical/Computer Engineering

Tools

Tempus

Certus

QRC

Job description

Cadence seeks a senior IC design expert to lead large-scale signoff initiatives from Washington. You will guide complex timing, STA/ECOs, and flow optimizations while shaping customer engagements and tool enhancements. The role demands executive-level collaboration and industry thought leadership.

The ideal candidate has 15+ years in IC design, strong scripting ability, and a deep Cadence toolkit background. This full-time position offers competitive compensation and benefits.