Senior IC Design Implementation & Signoff Architect

Cadence Design Systems; Beaverton (OR); On-site; USD 154,000 - 286,000; Full time

Benefits offered by this job

Paid vacation

401(k) match

Employee stock purchase plan

Medical/dental/vision

Job summary

Cadence Design Systems in Beaverton, OR seeks a senior leader to drive timing signoff strategy and large-scale IC design programs. You will guide customer success, collaborate with design teams, and champion advanced node timing across 3nm and below using Cadence tools.

The role demands exceptional communication, executive-level collaboration, and a track record of delivering complex signoff solutions with a strong scripting background.

Qualifications

• 15+ years of experience in IC design implementation and signoff.
• Deep expertise in digital design fundamentals and advanced node STA/ECOs.
• Proven track record leading technical teams and executive-level customer engagements.

Responsibilities

• Lead technical engagements with customers and partners to drive adoption of Cadence signoff portfolio.
• Collaborate with R&D and Product Engineering to influence tool enhancements.
• Drive benchmarks, flow optimizations, and deployment of timing signoff methods.
• Represent Cadence at industry forums and deliver technical papers or speeches.

Skills

IC design

Timing signoff

Scripting

Leadership

Education

BS/MS in Electrical/Computer Engineering

Tools

Cadence Tempus

Certus

QRC

Job description

Cadence Design Systems in Beaverton, OR seeks a senior leader to drive timing signoff strategy and large-scale IC design programs. You will guide customer success, collaborate with design teams, and champion advanced node timing across 3nm and below using Cadence tools.

The role demands exceptional communication, executive-level collaboration, and a track record of delivering complex signoff solutions with a strong scripting background.