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Cadence is seeking a Principal Analog IC Designer to lead the design and development of analog/mixed-signal IC blocks from concept through verification. The role requires deep expertise in CMOS SerDes/high-speed I/O, jitter control, and related CAD tools, with strong collaboration across teams.
Applicants should have 7+ years of CMOS SerDes experience and an MS/PhD in EE. On-site in California with competitive salary, bonus, equity, and comprehensive benefits.
Cadence is seeking a Principal Analog IC Designer to lead the design and development of analog/mixed-signal IC blocks from concept through verification. The role requires deep expertise in CMOS SerDes/high-speed I/O, jitter control, and related CAD tools, with strong collaboration across teams.
Applicants should have 7+ years of CMOS SerDes experience and an MS/PhD in EE. On-site in California with competitive salary, bonus, equity, and comprehensive benefits.