A complete application in a minute — tailored resume and cover letter, ready to send.
Cadence is seeking a Design Architect Analog IC Designer with 10+ years of CMOS SerDes experience to lead design and verification from concept through customer conformance. The role emphasizes high-speed I/O, jitter control, and advanced CAD tool use in ≤16nm processes.
Ideal candidates have strong problem-solving and communication skills, with proficiency in Cadence and lab testing. Collaboration across teams is essential to deliver complex SerDes blocks at ≥16Gbps.
Cadence is seeking a Design Architect Analog IC Designer with 10+ years of CMOS SerDes experience to lead design and verification from concept through customer conformance. The role emphasizes high-speed I/O, jitter control, and advanced CAD tool use in ≤16nm processes.
Ideal candidates have strong problem-solving and communication skills, with proficiency in Cadence and lab testing. Collaboration across teams is essential to deliver complex SerDes blocks at ≥16Gbps.