Senior HBM Design Verification Engineer (Lead)

Micron Technology; Richardson (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Micron Technology in Richardson, TX, is seeking a Senior/Staff Design Verification Engineer for High Bandwidth Memory (HBM) projects. You will evaluate full-chip and block-level designs, build verification environments, and drive coverage with mixed-signal and digital methods.

You will mentor engineers, collaborate with global teams, and apply advanced verification techniques to ensure robustness of high-density memory up to 32Gb.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field.
• 5–7+ years of mixed-signal and/or digital verification experience.
• Proficiency in SystemVerilog (SVA) including assertions.
• Strong debugging, analytical, and problem-solving skills.

Responsibilities

• Evaluate full-chip and block-level HBM and DRAM circuit designs to ensure functional correctness and performance.
• Develop verification plans from functional specifications in collaboration with architects and design teams.
• Create, enhance, and maintain verification environments, testbenches, test vectors, and regressions.
• Increase functional coverage across DRAM architectures and features using verification tools.
• Debug design issues, track bugs, and drive coverage and closure.
• Apply mixed-signal and digital verification techniques using industry-standard simulation tools.
• Collaborate with global design, verification, and product engineering teams to ensure project success.

Skills

SystemVerilog

CMOS fundamentals

Mixed-signal verification

Debugging skills

Analytical thinking

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

HSPICE

Verilog- HDL

FINESIM

Python scripting

Job description

Micron Technology in Richardson, TX, is seeking a Senior/Staff Design Verification Engineer for High Bandwidth Memory (HBM) projects. You will evaluate full-chip and block-level designs, build verification environments, and drive coverage with mixed-signal and digital methods.

You will mentor engineers, collaborate with global teams, and apply advanced verification techniques to ensure robustness of high-density memory up to 32Gb.