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Intel Corporation in Santa Clara is seeking a GPU Logic Design Engineer to develop RTL and GPU IP blocks for next-generation SoCs. You will optimize logic for power, performance, area, and timing while aligning with architecture and microarchitecture targets.
You will verify RTL, debug tests, and apply FEV techniques to ensure correctness across hierarchies. Collaborating with cross-functional teams, you will define architecture features and drive microarchitecture enhancements.
Intel Corporation in Santa Clara is seeking a GPU Logic Design Engineer to develop RTL and GPU IP blocks for next-generation SoCs. You will optimize logic for power, performance, area, and timing while aligning with architecture and microarchitecture targets.
You will verify RTL, debug tests, and apply FEV techniques to ensure correctness across hierarchies. Collaborating with cross-functional teams, you will define architecture features and drive microarchitecture enhancements.