GPU RTL Design Engineer — Hybrid Work, SoC Blocks

Intel Corporation; Santa Clara, Northern (CA, KY); Hybrid; USD 106,000 - 200,000; Full time

Job summary

Intel Corporation in Santa Clara seeks a GPU Logic Design Engineer to develop RTL code and implement optimized GPU IP blocks for next‑generation SoCs.

You will collaborate with cross‑functional teams to define architecture/microarchitecture features, optimize power, performance, and timing, and verify designs across hierarchies. The role involves hybrid on‑site/off‑site work with a strong emphasis on teamwork and innovation.

Qualifications

• Bachelor's degree or higher in EE/CE/CS or related field with RTL design and SystemVerilog experience.
• Master's degree or PhD with RTL design and SystemVerilog experience is a plus.
• Experience in power, performance, area, and timing optimization is desirable.

Responsibilities

• Develop RTL code and implement optimized GPU IP logic.
• Perform power, performance, area, and timing optimization during physical implementation.
• Collaborate with SoC teams to ensure smooth integration of GPU blocks into full-chip designs.

Skills

RTL design

SystemVerilog

Verification

Education

Bachelor's degree in Electrical Engineering / Computer Engineering / Computer Science

Master's degree in Electrical Engineering / Computer Engineering / Computer Science

PhD in Electrical Engineering / Computer Engineering / Computer Science

Tools

UPF

Static timing analysis

FEV

TCL scripting

Job description

Intel Corporation in Santa Clara seeks a GPU Logic Design Engineer to develop RTL code and implement optimized GPU IP blocks for next‑generation SoCs.

You will collaborate with cross‑functional teams to define architecture/microarchitecture features, optimize power, performance, and timing, and verify designs across hierarchies. The role involves hybrid on‑site/off‑site work with a strong emphasis on teamwork and innovation.