Senior Front-End ASIC Architect & Tech Lead

Anysilicon; North Carolina; Hybrid; USD 180.000 - 240.000; Vollzeit

Zusammenfassung

Cisco Systems in RTP, NC is seeking an ASIC Technical Lead to drive front-end ASIC development, architecture, verification, synthesis, and timing analysis for high-performance networks.

You will mentor engineers, review designs, develop RTL subsystems, create clocking diagrams, and collaborate with Physical Design, DFT, SW/SDK teams to deliver a unified silicon architecture across web-scale and service-provider networks.

Qualifikationen

• Bachelor’s or Master’s degree in Electrical or Computer Engineering with required years of ASIC experience.
• Experience in block/subsystem RTL development and STA.
• Proficient with PrimeTime/Tempus and synthesis tools.
• Strong Verilog/SystemVerilog and HDL skills.

Aufgaben

• Lead front-end ASIC development including architecture, design, verification, synthesis, and STA.
• Review specs and participate in design reviews to influence testability and verification efficiency.
• Architect RTL subsystems and perform top-level IP integration.
• Mentor early-career engineers and foster continuous improvement.
• Collaborate with Physical Design and DFT teams to meet timing and testability.
• Partner with SW/SDK teams to implement system-level features and APIs.

Kenntnisse

Frontend ASIC development

RTL design

Static Timing Analysis

Verilog/SystemVerilog

Design Verification

Clocking and timing

Scripting (Python, TCL)

Mentorship

Ausbildung

Electrical or Computer Eng degree

Tools

PrimeTime/Tempus

Synopsys DC/DCG/FC

Verilog/SystemVerilog

Veloce/HAPS

Spyglass & Cadence LEC

Jobbeschreibung

Cisco Systems in RTP, NC is seeking an ASIC Technical Lead to drive front-end ASIC development, architecture, verification, synthesis, and timing analysis for high-performance networks.

You will mentor engineers, review designs, develop RTL subsystems, create clocking diagrams, and collaborate with Physical Design, DFT, SW/SDK teams to deliver a unified silicon architecture across web-scale and service-provider networks.