Senior Post-Silicon DFT Lead for ASICs

020 Cisco Systems, Inc.; Austin (TX); On-site; USD 178,000 - 257,000; Full time

Job summary

Cisco Systems, Inc. seeks a Senior ASIC post-silicon DFT Lead to work across post-silicon validation, reliability, and systems teams. You will define bringup to production roadmaps, drive DFT requirements early in design, and help shape next-generation networking chips at scale.

Lead the post-silicon process through production, collaborate with multiple engineering teams, and leverage VCS/P1687 knowledge to optimize validation and yield in a fast-paced environment.

Qualifications

• Bachelor's or a Master's Degree in Electrical or Computer Engineering required with at least 12 years of experience.
• Prior experience in post-silicon validation, hardware bring-up, Yield/reliability learnings, ramp acceleration, FA efficiency, and production scalability.
• Prior experience working with DFT team & post-silicon validation from initial bringup to high volume production.
• Prior experience working with Gate level simulation, debugging with VCS and other simulators.
• Post-silicon validation and debug experience; Ability to work with ATE patterns, P1687.

Responsibilities

• Define post-silicon bringup to production roadmap and drive DFT requirements early in the design cycle.
• Lead collaboration with Reliability, Board, and package teams across testing and systems.
• Help craft next generation networking chips and drive post-silicon processes through production.

Skills

Post-silicon validation

DFT design

Verilog

Leadership

Education

Bachelor's or Master's in Electrical or Computer Engineering

Tools

VCS

P1687

Job description

Cisco Systems, Inc. seeks a Senior ASIC post-silicon DFT Lead to work across post-silicon validation, reliability, and systems teams. You will define bringup to production roadmaps, drive DFT requirements early in design, and help shape next-generation networking chips at scale.

Lead the post-silicon process through production, collaborate with multiple engineering teams, and leverage VCS/P1687 knowledge to optimize validation and yield in a fast-paced environment.