Senior FPGA Verification Lead

Visa Hunt; Goleta (CA); On-site; USD 191,000 - 253,000; Full time

Benefits offered by this job

Equity grants

Top-tier benefits

Job summary

Anduril Industries in California is seeking a Senior FPGA Verification Engineer to lead verification efforts for new product lines. You will collaborate with an interdisciplinary team to define designs, build prototypes, and mature them into deployable products for ground and flight testing.

The role requires extensive HDL/RTL experience, SystemVerilog, and hands-on testbench development, with opportunities to drive verification practices and tool choices. A U.S.

Qualifications

• Bachelor’s in Electrical or Computer Engineering or related technical field.
• 8+ years in HDL firmware and FPGA/ASIC verification.
• Experience with VHDL and/or Verilog in professional environments.
• Ability to design and execute verification testbenches for RTL blocks.
• Experience with chip-level verification methodologies and SystemVerilog assertions.
• Experience with Git or Subversion for source control.
• Eligible to obtain an active U.S. Secret security clearance.

Responsibilities

• Design and implement verification environments using SystemVerilog/OVM/UVM.
• Create test plans, test cases, and track code and functional coverage.
• Develop testbenches for RTL blocks in VHDL/SystemVerilog.
• Recommend tools and methods to improve the verification flow.
• Contribute to engineering estimates for new programs.
• Provide technical leadership for project verification teams.

Skills

HDL firmware development

RTL verification

VHDL

Verilog

SystemVerilog

Testbench development

Git/Subversion

IEEE verification methodologies

Education

Bachelor's in Electrical or Computer Engineering

Tools

QuestaSim

Synplify

Quartus

Vivado

Job description

Anduril Industries in California is seeking a Senior FPGA Verification Engineer to lead verification efforts for new product lines. You will collaborate with an interdisciplinary team to define designs, build prototypes, and mature them into deployable products for ground and flight testing.

The role requires extensive HDL/RTL experience, SystemVerilog, and hands-on testbench development, with opportunities to drive verification practices and tool choices. A U.S.