Senior FPGA Verification Engineer, Flight-Critical UVM Expert

Visa Hunt

Costa Mesa (CA)

On-site

USD 166,000 - 220,000

Full time

7 days ago
Be an early applicant
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Benefits offered by this job

Competitive benefits
Equity grants

Job summary

Anduril Industries seeks a Senior FPGA Verification Engineer to own the verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics in Costa Mesa, CA. You will focus on UVM-based verification, SystemVerilog, and SVA, contributing to rapid avionics development and DO-254 safety alignment.

The role requires 8+ years in FPGA/ASIC verification, strong HDL skills, and experience with industry simulators.

Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 8+ years of FPGA/ASIC verification experience.
  • Proficient in SystemVerilog, UVM, SVA, with experience extending UVM testbenches.
  • Object-oriented programming principles.
  • Linux development environments and Git-based collaboration.
  • Eligible to obtain and hold a U.S. Secret security clearance.

Responsibilities

  • Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs.
  • Develop verification plans traceable to system and hardware requirements.
  • Author SystemVerilog Assertions (SVA) for protocol checks.
  • Build functional coverage models and drive code coverage to closure.
  • Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs.
  • Establish and maintain regression suites, tracking coverage metrics and verification progress.
  • Debug failures using waveform tools and simulation logs at HDL and system level.
  • Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement.
  • Support hardware validation and board bring-up on target platforms.
  • Ensure verification meets DO-254 and relevant safety standards.
  • Author verification closure reports and coverage analysis summaries.

Skills

SystemVerilog
UVM methodology
SVA
FPGA/ASIC verification
Object-oriented programming
Linux development
Git workflows
HDL debugging
Verilog/VHDL

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
Master’s degree in Electrical Engineering, Computer Engineering, or related field

Tools

Questa
VCS
Xcelium
Vivado

Job description

Anduril Industries seeks a Senior FPGA Verification Engineer to own the verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics in Costa Mesa, CA. You will focus on UVM-based verification, SystemVerilog, and SVA, contributing to rapid avionics development and DO-254 safety alignment.

The role requires 8+ years in FPGA/ASIC verification, strong HDL skills, and experience with industry simulators.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Flight-Critical FPGA Verification Engineer (UVM/SoC)
Flight-Critical FPGA Verification Engineer (UVM/SoC)

Slope • Costa Mesa (CA)

On-site
USD 146,000 - 194,000
Flight-Critical FPGA Verification Engineer | UVM & DO-254
Flight-Critical FPGA Verification Engineer | UVM & DO-254

Anduril Industries • Costa Mesa (CA)

On-site
USD 146,000 - 194,000
Equity grants
Health benefits
Top-tier benefits
Senior FPGA Verification Engineer – Avionics/DO-254
Senior FPGA Verification Engineer – Avionics/DO-254

Anduril Industries • Costa Mesa (CA)

On-site
USD 166,000 - 220,000
Avionics FPGA Verification Engineer — UVM, DO-254
Avionics FPGA Verification Engineer — UVM, DO-254

Linuxconfig • Costa Mesa (CA), Northern (KY)

Hybrid
USD 146,000 - 194,000
FPGA Verification Engineer Air Dominance and Strike for Fastwater Staffing
FPGA Verification Engineer Air Dominance and Strike for Fastwater Staffing

HIKINEX • Costa Mesa (CA)

On-site
USD 100,000 - 130,000
Senior FPGA Verification Engineer, Air Dominance and Strike
Senior FPGA Verification Engineer, Air Dominance and Strike

Anduril Industries • Costa Mesa (CA)

On-site
USD 166,000 - 220,000
FPGA Verification Engineer, Air Dominance and Strike
FPGA Verification Engineer, Air Dominance and Strike

Anduril Industries • Costa Mesa (CA)

On-site
USD 146,000 - 194,000
Equity grants
Health benefits
Top-tier benefits
Senior FPGA Verification Engineer | RTL & SystemVerilog
Senior FPGA Verification Engineer | RTL & SystemVerilog

Slope • Waltham (MA)

On-site
USD 166,000 - 220,000
Equity grants
Benefits package
FPGA Verification Engineer, Air Dominance and Strike
FPGA Verification Engineer, Air Dominance and Strike

Linuxconfig • Costa Mesa (CA), Northern (KY)

Hybrid
USD 146,000 - 194,000
FPGA Verification Engineer, Air Dominance and Strike
FPGA Verification Engineer, Air Dominance and Strike

Slope • Costa Mesa (CA)

On-site
USD 146,000 - 194,000