Senior FPGA Verification Engineer — Flight‑Critical UVM Expert

Anduril-1; Costa Mesa (CA); On-site; USD 166,000 - 220,000; Full time

Benefits offered by this job

Equity opportunities

Comprehensive benefits

Job summary

Anduril Industries in Costa Mesa, CA, seeks a Senior FPGA Verification Engineer to own FPGA/SoC verification on AMD (Xilinx) platforms for flight-critical avionics, using UVM and SystemVerilog.

You will develop verification environments, coverage models, and constrained-random tests, collaborating with RTL/design engineers and validating hardware on target platforms. A strong 8+ year background in FPGA/ASIC verification and security-clearance eligibility is required.

Qualifications

• Bachelor’s degree required in Electrical Engineering, Computer Engineering, or related field.
• 8+ years of FPGA/ASIC verification experience.
• Proficient in SystemVerilog, UVM, and SVA with experience extending UVM testbenches.
• Object-oriented programming principles.
• Experience with industry simulators such as Questa, VCS, Xcelium, or Vivado.
• Git-based collaboration including code review.
• Eligible to obtain and hold a U.S. Secret security clearance.

Responsibilities

• Architect and implement UVM verification environments for FPGA/SoC designs.
• Develop verification plans with traceability to system and hardware requirements.
• Author SystemVerilog Assertions for protocol checks.
• Build functional coverage models and drive coverage closure.
• Develop constrained-random and transaction-level test sequences.
• Establish and maintain regression suites with coverage metrics.
• Debug failures using waveform tools and simulation logs.
• Collaborate with design engineers on RTL reviews and bug resolution.
• Support hardware validation and board bring-up on target platforms.
• Ensure verification meets DO-254 and safety standards.
• Author verification closure reports and coverage summaries.

Skills

Strong communication

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field

Tools

SystemVerilog

UVM

SVA

Questa

VCS

Xcelium

Vivado

Job description

Anduril Industries in Costa Mesa, CA, seeks a Senior FPGA Verification Engineer to own FPGA/SoC verification on AMD (Xilinx) platforms for flight-critical avionics, using UVM and SystemVerilog.

You will develop verification environments, coverage models, and constrained-random tests, collaborating with RTL/design engineers and validating hardware on target platforms. A strong 8+ year background in FPGA/ASIC verification and security-clearance eligibility is required.