Lead FPGA Verification Engineer: RTL/SystemVerilog Expert

Anduril-1; Boulder (CO); On-site; USD 165,000 - 218,000; Full time

Benefits offered by this job

Equity grants

Health benefits

Retirement plan

Job summary

Anduril Industries is seeking a Senior FPGA Verification Engineer to help design and verify new product lines, working with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products.

You will architect verification environments using SystemVerilog/OVM/UVM, develop testbenches in VHDL/Verilog, and contribute to tool choices while ensuring robust RTL block verification and timely

Qualifications

• ABachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typicallyrequired.
• 8+ years of experience developing HDL firmware for FPGA devices.
• Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
• Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/orSystemVerilog.
• experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
• Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, andmaintainconfiguration integrity.
• Eligible to obtain andmaintainan active U.S. Secret security clearance

Responsibilities

• Verification environment architecture and design usingtools likeSystemVerilogorOVM/UVM
• Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking
• Testbench development for the verification of RTL blocks using VHDL orSystemVerilog
• Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status

Skills

HDL firmware development

RTL verification

Testbench development

Team leadership

Education

Bachelor's in Electrical or Computer Engineering

Tools

SystemVerilog

VHDL

Verilog

QuestaSim

Synplify

Quartus

Vivado

Git/Subversion

Unix/Linux

Job description

Anduril Industries is seeking a Senior FPGA Verification Engineer to help design and verify new product lines, working with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products.

You will architect verification environments using SystemVerilog/OVM/UVM, develop testbenches in VHDL/Verilog, and contribute to tool choices while ensuring robust RTL block verification and timely