Senior FPGA Fabric Architect: Micro-Architecture Lead

Lattice Semiconductor Corp; Nellis Air Force Base Census-Designated Place (NV); On-site; USD 225,000 - 275,000; Full time

Job summary

Lattice Semiconductor seeks a Principal FPGA Micro-Architect to define the micro-architecture of the FPGA fabric primitives and drive performance, power, and area optimizations across device generations. You will shape architectures targeting AI, robotics, space, data centers, and edge applications.

You will model performance with SystemC/C++ and collaborate with architecture, firmware, and CAD teams through silicon validation and post-silicon debugging, applying AI methods to accelerate

Qualifications

• MS or PhD in Electrical or Computer Engineering.
• 15+ years FPGA fabric micro-architecture experience.
• Proficiency with SystemVerilog/Verilog.

Responsibilities

• Define micro-architecture of core fabric primitives: Programmable Logic Elements, DSP blocks, embedded memory blocks, interconnect routing, configuration memory, carry chains, and clocking structures.
• Drive fabric PPAU (power, performance, area, and utilization) optimization; evaluate implementation and routing feasibility and drive design trade-offs for modularity and scalability across device generations.
• Develop SystemC/C++ architectural models to drive performance analysis and evaluate fabric design trade-offs ahead of RTL/schematic availability.
• Lead advanced low-power fabric design including clock and power islands, power gating, dual-rail architectures, and dynamic power mode switching.
• Drive software primitive definition and implementation strategy, ensuring fabric elements are optimally mapped to CAD tools and customer design flows for maximum usability.
• Partner with architecture, DV, firmware, and CAD teams across the full product lifecycle from concept through silicon validation and post-silicon debug.
• Apply agentic AI methodologies to scale and accelerate micro-architecture exploration and design execution.

Skills

FPGA fabric

SystemVerilog/Verilog

SystemC/C++ modeling

Low-power design

Executive communication

Education

MS/PhD in Electrical or Computer Engineering

Tools

SystemC/C++ architectural modeling

Job description

Lattice Semiconductor seeks a Principal FPGA Micro-Architect to define the micro-architecture of the FPGA fabric primitives and drive performance, power, and area optimizations across device generations. You will shape architectures targeting AI, robotics, space, data centers, and edge applications.

You will model performance with SystemC/C++ and collaborate with architecture, firmware, and CAD teams through silicon validation and post-silicon debugging, applying AI methods to accelerate