Senior Staff FPGA Design Engineer: DDR/IP Lead

Lattice Semiconductor

San Jose (CA)

On-site

USD 150,000 - 210,000

Full time

8 days ago

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Job summary

Lattice Semiconductor seeks an experienced Design Engineer specializing in RTL design and verification for FPGA-based systems. You will drive embedded design within Lattice FPGAs, integrate IPs, and collaborate with software teams to meet customer requirements.

The role emphasizes hands-on development, timing closure, and leadership across projects, with a focus on delivering high-performance programmable logic solutions in a fast-paced environment.

Qualifications

  • FPGA RTL design, verification, debug and timing closure.
  • IPs for FPGA and ASIC products, high-speed interfaces.
  • DDR protocols (DDR3/4/5) and PCIe/Ethernet/MIPI.

Responsibilities

  • Develop complex systems from concept to board-level validation using Lattice FPGA architectures and tool flows.
  • Build embedded systems within Lattice FPGAs, including microprocessor design and embedded software development.
  • Integrate IPs into FPGA software flows and support end-to-end system implementation.
  • Analyze hardware capabilities and contribute to customer solution strategies.
  • Architect Soft IPs with detailed specs and coordinate development efforts.
  • Collaborate cross-functionally with software and applications teams to communicate requirements.

Skills

FPGA RTL design
IP for FPGA/ASIC
DDR protocols
PCIe / Ethernet / MIPI
High-speed interfaces
Peripheral IPs (UART SPI I2C I3C)
Hardware validation
Team leadership

Education

Bachelor's degree in Electronics Engineering, Applied Physics or related field

Tools

Lattice FPGA tool flows

Job description

Lattice Semiconductor seeks an experienced Design Engineer specializing in RTL design and verification for FPGA-based systems. You will drive embedded design within Lattice FPGAs, integrate IPs, and collaborate with software teams to meet customer requirements.

The role emphasizes hands-on development, timing closure, and leadership across projects, with a focus on delivering high-performance programmable logic solutions in a fast-paced environment.

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