Senior FPGA Architect for Memory Test Systems

Teradyne; Tualatin (OR); On-site; USD 123,100 - 196,900; Full time

Benefits offered by this job

Health insurance

Dental & vision coverage

Retirement savings plans

Paid vacation & holidays

Tuition assistance

Job summary

Teradyne’s Memory Test Division (MTD) seeks a motivated FPGA Engineer to architect FPGA solutions for Flash/DRAM test instrumentation. You will contribute to high-performance test systems, collaborating with a global team to deliver reliable products on tight schedules.

Ideal candidates have a strong RTL/Verilog background, FPGA tool-flow experience, and familiarity with C/C++. You’ll guide juniors, maintain designs, and may travel to customer sites as needed.

Qualifications

• Bachelor’s degree with 5+ years of relevant experience, or Master’s with 3+ years.
• Experience with Digital Design and Architecture.
• RTL coding, synthesis, timing closure and lab validation.
• Experience with Static Timing Analysis of ASICs or FPGAs.
• Experience with digital simulation testbench creation.
• Experience with C or C++.
• Familiarity with lab equipment such as oscilloscopes, power supplies and waveform generators.

Responsibilities

• Architect and implement FPGA solutions to support next generation Flash and DRAM test instrumentation.
• Provide technical guidance to junior engineers.
• Turn abstract concepts and customer requirements into reliable, extensible, and supportable designs.
• Assist in maintenance and extension of existing FPGA designs to support quality improvement and emerging customer requirements.
• Maintain schedule commitments and deliver high-quality end products.
• Occasional travel may be required.

Skills

Digital design

RTL coding

Verilog HDL

C/C++

Timing analysis

Lab testing

UVM methodology

FPGA tool flows

Education

Bachelor’s Degree in Electrical Engineering or related field

Master’s Degree in Electrical Engineering or related field

Tools

Altera/AMD FPGA tool flows

Job description

Teradyne’s Memory Test Division (MTD) seeks a motivated FPGA Engineer to architect FPGA solutions for Flash/DRAM test instrumentation. You will contribute to high-performance test systems, collaborating with a global team to deliver reliable products on tight schedules.

Ideal candidates have a strong RTL/Verilog background, FPGA tool-flow experience, and familiarity with C/C++. You’ll guide juniors, maintain designs, and may travel to customer sites as needed.