FPGA Design Engineer - Memory Test Solutions

Teradyne; San Jose (CA); On-site; USD 135,400 - 216,600; Full time

Job summary

Teradyne’s Memory Test Division seeks a motivated FPGA Design Engineer to develop next‑generation memory test solutions. You will architect FPGA designs for Flash and DRAM instrumentation and collaborate with a global team to deliver reliable, high‑quality products to market quickly.

Qualified candidates have a strong background in digital design, RTL coding, timing analysis, and experience with FPGA tool flows and Verilog.

Qualifications

• Bachelor’s Degree or equivalent in Electrical Engineering or related field with 5+ years experience, or Master’s with 3+ years.
• Experience with Digital Design and Architecture.
• RTL coding, synthesis, timing closure and lab validation.
• Experience with Static Timing Analysis of ASICs or FPGAs.
• Experience with digital simulation testbench creation.
• Experience with C or C++.
• Familiarity with lab equipment such as oscilloscopes, power supplies and waveform generators.

Responsibilities

• Architect and implement FPGA solutions to support next generation Flash and DRAM test instrumentation.
• Provide technical guidance to junior engineers.
• Turn abstract concepts and customer requirements into reliable, extensible, and supportable designs.
• Assist in the maintenance and extension of existing FPGA designs to support quality improvement and emerging customer requirements.
• Maintain schedule commitments and deliver high quality end products.
• Occasional travel may be required.

Skills

Digital Design

RTL Coding

Timing Closure

Lab Validation

C/C++

Education

Bachelor’s Degree in Electrical Engineering

Master’s Degree in Electrical Engineering

Tools

Oscilloscopes

Waveform Generators

Job description

Teradyne’s Memory Test Division seeks a motivated FPGA Design Engineer to develop next‑generation memory test solutions. You will architect FPGA designs for Flash and DRAM instrumentation and collaborate with a global team to deliver reliable, high‑quality products to market quickly.

Qualified candidates have a strong background in digital design, RTL coding, timing analysis, and experience with FPGA tool flows and Verilog.