Senior Formal Verification Engineer — CPU Core

The Best Job Board; Austin (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

SiFive is seeking a Staff Design Verification Engineer to drive formal verification of high-performance CPU core functionality. This role, within the CPU Design Verification group, focuses on applying formal methods to complex out-of-order CPU core microarchitecture and requires independent ownership of verification challenges.

You will define verification strategies, build scalable environments, and collaborate with architecture, RTL, and simulation DV teams to improve proof convergence and

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 7+ years of ASIC/CPU/core or SoC design verification withStaff-level ownership.
• Direct experience with CPU/core verification and strong knowledge of computer architecture.

Responsibilities

• Own formal verification planning and execution for high-performance out-of-order CPU core areas.
• Develop formal verification plans based on architectural intent and microarchitectural risk.
• Create and maintain scalable formal environments, property sets, checkers, and proof infrastructure.
• Target high-value CPU verification problems such as pipeline control, issue/dispatch correctness, load-store ordering.
• Analyze proof failures and drive fixes across RTL, properties, and verification infrastructure.
• Mentor engineers and share formal-debug best practices.

Skills

CPU verification

Formal verification

Debugging

Python scripting

Education

Bachelor/Master in EE/CS

Tools

Formal tools

Simulation tools

Job description

SiFive is seeking a Staff Design Verification Engineer to drive formal verification of high-performance CPU core functionality. This role, within the CPU Design Verification group, focuses on applying formal methods to complex out-of-order CPU core microarchitecture and requires independent ownership of verification challenges.

You will define verification strategies, build scalable environments, and collaborate with architecture, RTL, and simulation DV teams to improve proof convergence and