Senior DV Engineer — High-Performance CPU Core

SiFive, Inc.; Town of Texas (WI); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Healthcare

Retirement plans

Paid time off

Job summary

SiFive is seeking a Senior Design Verification Engineer to drive functional verification of high-performance CPU core units, including out-of-order cores. You will collaborate with architecture, RTL, performance, and verification teams to ensure design intent is verified, risks are identified early, and signoff quality is achieved with strong technical execution.

The role emphasizes ownership of verification planning, test strategy, and building robust verification environments while

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 3+ years of relevant experience in IP, CPU/core, or SoC functional verification.
• Strong hands-on experience with SystemVerilog and UVM-based verification methodologies.
• Solid understanding of computer architecture and CPU microarchitecture fundamentals.
• Experience with test planning, testbench development, constrained-random verification, failure analysis, coverage analysis, and coverage closure.
• Strong debug skills and the ability to translate architectural intent into effective verification strategy and execution.
• Strong programming and scripting fundamentals for building scalable verification solutions.

Responsibilities

• Own verification planning and execution for assigned high-performance CPU core areas, from block-level verification through core-level integration.
• Create effective verification strategies and test plans based on CPU architecture and microarchitectural behavior.
• Develop and maintain robust verification environments, testbenches, checkers, scoreboards, assertions, stimulus, and coverage models.
• Define and execute directed and constrained-random tests that expose corner cases in branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazard handling, load/store ordering, memory consistency, and hardware prefetch behavior.
• Analyze failures, isolate root cause, and drive fixes across RTL, testbench infrastructure, assertions, and test content.
• Collaborate closely with architecture and design teams to review specifications, identify ambiguities early, and improve verification quality and debugability.
• Write functional coverage, analyze code and functional coverage, and close coverage gaps to ensure verification completeness and signoff quality.
• Contribute to reusable DV methodology, automation, and infrastructure that improve team productivity and verification quality across future core generations.

Skills

SystemVerilog

UVM

Debugging

Computer architecture

Test planning

Testbench development

Constrained-random verification

Coverage analysis

Scripting

CPU verification

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Job description

SiFive is seeking a Senior Design Verification Engineer to drive functional verification of high-performance CPU core units, including out-of-order cores. You will collaborate with architecture, RTL, performance, and verification teams to ensure design intent is verified, risks are identified early, and signoff quality is achieved with strong technical execution.

The role emphasizes ownership of verification planning, test strategy, and building robust verification environments while