Senior Flip-Chip BGA Package Designer – SerDes & RF

Advanced Technology Search; Fort Collins, San Jose (CO, CA); On-site; USD 120,000 - 150,000; Full time

Job summary

A leading technology recruitment firm is seeking an experienced Package Design Engineer in Fort Collins, Colorado. This role involves designing complex flip-chip-BGA packages, particularly for ASICs in high-speed SerDes and RF communications. The ideal candidate has over 12 years of relevant experience and strong skills in Cadence tools, collaboration, and project management. This position offers a chance to innovate within a worldwide R&D team focused on developing cutting-edge technologies.

Qualifications

• 12+ years’ experience in flip-chip-BGA package design.
• Knowledge of package-level signal integrity and power integrity.
• Experience with high-speed SerDes.

Responsibilities

• Overall design responsibility for ASIC package designs.
• Track work across multiple projects.
• Collaborate with a worldwide R&D team.

Skills

Cadence SKILL for Allegro

Package design

Signal integrity

Power integrity

Thermal analysis

Education

BSEE or similar

MSEE or similar

Tools

Cadence APD

Job description

A leading technology recruitment firm is seeking an experienced Package Design Engineer in Fort Collins, Colorado. This role involves designing complex flip-chip-BGA packages, particularly for ASICs in high-speed SerDes and RF communications. The ideal candidate has over 12 years of relevant experience and strong skills in Cadence tools, collaboration, and project management. This position offers a chance to innovate within a worldwide R&D team focused on developing cutting-edge technologies.