Senior DV Engineer: AI-Enhanced SoC Verification

1000 Micron Technology, Inc.; Minneapolis (MN); On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Paid time-off program

Paid holidays

Job summary

1000 Micron Technology, Inc. is seeking a technical member for their ASIC Design Verification team to validate complex SoC designs. The role involves developing verification environments, defining verification plans, enhancing testbenches, and collaborating closely with design teams.

Ideal candidates hold a Bachelor’s or Master’s degree in Electrical or Computer Engineering and possess over 6 years of IP or SoC verification experience, with proficiency in UVM, SystemVerilog, and Python. Opportunities exist to utilize AI to improve verification processes.

Qualifications

• 6+ years of experience in IP or SoC verification.
• Hands-on experience with UVM and constrained-random verification.
• Strong proficiency in SystemVerilog and Python.

Responsibilities

• Develop and maintain UVM-based SystemVerilog verification environments.
• Define and execute block and system-level verification plans.
• Build and enhance Python-based testbenches and simulation infrastructure.

Skills

UVM and constrained-random verification

SystemVerilog

Python

Analytical skills

Debugging skills

Communication skills

Education

Bachelor’s or Master’s degree in Electrical or Computer Engineering

Job description

1000 Micron Technology, Inc. is seeking a technical member for their ASIC Design Verification team to validate complex SoC designs. The role involves developing verification environments, defining verification plans, enhancing testbenches, and collaborating closely with design teams.

Ideal candidates hold a Bachelor’s or Master’s degree in Electrical or Computer Engineering and possess over 6 years of IP or SoC verification experience, with proficiency in UVM, SystemVerilog, and Python. Opportunities exist to utilize AI to improve verification processes.