Senior Design Verification Engineer - AI-Driven SoC Validation

Micron Technology, Inc

Minneapolis (MN)

On-site

USD 110,000 - 140,000

Full time

14 days+

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Benefits offered by this job

Medical, dental, and vision plans
Paid family leave
Robust paid time-off program
Paid holidays

Job summary

Micron Technology, Inc in Minneapolis is seeking an experienced ASIC Design Verification Engineer. In this role, you will develop and maintain UVM-based SystemVerilog verification environments and collaborate with design teams to ensure the functionality of our advanced ASICs.

The ideal candidate will have a Bachelor’s or Master’s degree in Electrical or Computer Engineering, with 6+ years of experience in IP or SoC verification, and hands-on expertise with UVM and SystemVerilog. Strong analytical skills and proficiency in Python are essential.

Qualifications

  • 6+ years of experience in IP or SoC verification.
  • Hands-on experience with UVM and constrained-random verification.
  • Exposure to microcode, assembly language, or firmware development.

Responsibilities

  • Develop and maintain UVM-based SystemVerilog verification environments.
  • Define and execute block and system-level verification plans.
  • Build and enhance Python-based testbenches and simulation infrastructure.

Skills

UVM and constrained-random verification
SystemVerilog
Python programming
Analytical and debugging skills

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Job description

Micron Technology, Inc in Minneapolis is seeking an experienced ASIC Design Verification Engineer. In this role, you will develop and maintain UVM-based SystemVerilog verification environments and collaborate with design teams to ensure the functionality of our advanced ASICs.

The ideal candidate will have a Bachelor’s or Master’s degree in Electrical or Computer Engineering, with 6+ years of experience in IP or SoC verification, and hands-on expertise with UVM and SystemVerilog. Strong analytical skills and proficiency in Python are essential.

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