Senior DRAM Design Engineer — Next‑Gen Memory

Micron Memory Malaysia Sdn Bhd; Boise (ID); On-site; USD 130,000 - 170,000; Full time

Job summary

Micron Technology in Boise, Idaho, seeks a Principal DRAM Design Engineer to shape memory architectures and drive circuit innovations from concept to silicon validation. You will own design and optimization of DRAM circuits, including memory array, control logic, datapath, and test logic, while collaborating with cross-functional teams to deliver high-performance memory solutions.

Ideal candidates have a BS in Electrical Engineering and 2+ years in circuit design or 4+ years in product

Qualifications

• BS in Electrical Engineering or related field.
• Strong fundamentals in analog and digital circuits.
• Experience with circuit simulations and Verilog.

Responsibilities

• Lead design and optimization of DRAM circuits including memory array and datapath.
• Perform simulations using SPICE and Verilog to validate designs.
• Assess architectural trade-offs for power, performance and die size.
• Collaborate with cross-functional teams to bring designs to silicon.

Skills

Circuit design

Analog fundamentals

Digital fundamentals

SPICE simulations

Verilog

CMOS understanding

Education

Bachelor’s degree in Electrical Engineering

Tools

SPICE

Verilog

DFT/DFM tools

Job description

Micron Technology in Boise, Idaho, seeks a Principal DRAM Design Engineer to shape memory architectures and drive circuit innovations from concept to silicon validation. You will own design and optimization of DRAM circuits, including memory array, control logic, datapath, and test logic, while collaborating with cross-functional teams to deliver high-performance memory solutions.

Ideal candidates have a BS in Electrical Engineering and 2+ years in circuit design or 4+ years in product