Senior Digital Verification Engineer – ASIC/FPGA

SpaceX; Irvine (CA); On-site; USD 210,000 - 335,000; Full time

Job summary

SpaceX is seeking a Principal Design Verification Engineer (Silicon Engineering) to lead digital ASIC/FPGA verification for Starlink and SpaceX hardware platforms. You will work with cross-disciplinary teams to verify complex digital designs, from block-level tests to full-system validation, enabling robust satellite and ground infrastructures.

We expect a strong background in verification methodologies (UVM/OVM/VMM), extensive Python scripting, and hands-on RTL experience.

Qualifications

• Bachelor's degree in electrical engineering, computer engineering, or computer science.
• 10+ years of experience with design verification and test bench development.
• Advanced degree in electrical engineering or computer engineering.
• Experience with verification methodologies such as UVM/OVM/VMM.
• Strong object-oriented programming knowledge.
• Strong problem-solving and coding skills.
• Experience in constrained random verification.
• RTL design, chip bring-up, and post-silicon validation experience.
• Ability to work in a dynamic environment with changing needs and requirements.

Responsibilities

• Responsible for digital ASIC and/or FPGA verification at block and system level
• Lead and execute verification test plan, development, and milestones from beginning to end
• Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
• Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

Skills

Object-oriented programming

Problem solving

Coding skills

Dynamic environment adaptability

Education

Bachelor's degree in Electrical/ Computer Engineering or Computer Science

Advanced degree preferred

Tools

UVM/OVM/VMM

Python automation

RTL design

Chip bring-up

Post-silicon validation

Job description

SpaceX is seeking a Principal Design Verification Engineer (Silicon Engineering) to lead digital ASIC/FPGA verification for Starlink and SpaceX hardware platforms. You will work with cross-disciplinary teams to verify complex digital designs, from block-level tests to full-system validation, enabling robust satellite and ground infrastructures.

We expect a strong background in verification methodologies (UVM/OVM/VMM), extensive Python scripting, and hands-on RTL experience.