Senior ASIC/FPGA Design Verification Lead

SpaceX; Redmond (WA); On-site; USD 210,000 - 335,000; Full time

Benefits offered by this job

Stock options

Medical, vision, dental coverage

401(k) retirement plan

Paid vacation & holidays

Parental leave

Job summary

SpaceX is seeking a Principal Design Verification Engineer for silicon engineering to lead digital ASIC/FPGA verification from block to system level. You will drive verification test plans and milestones, contribute to pre-silicon and post-silicon validation, and be a hands-on engineer executing complex verification tasks.

You will collaborate with cross-disciplinary teams and work on cutting-edge ASICs for Starlink, enabling global connectivity and space infrastructure.

Qualifications

• Bachelor’s degree in electrical engineering, computer engineering, or computer science.
• 10+ years of experience with design verification and test bench development.
• 10+ years of experience with design verification and test bench development.

Responsibilities

• Responsible for digital ASIC and/or FPGA verification at block and system level.
• Lead and execute verification test plan, development, and milestones from beginning to end.
• Contribute towards pre-silicon verification, chip bring-up and post-silicon validation.
• Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs.

Skills

Design verification

Test bench development

UVM/OVM/VMM

Python scripting

Object oriented programming

Constrained random verification

RTL design

Education

Bachelor’s degree in electrical/computer engineering or computer science

Advanced degree in electrical/computer engineering

Tools

Python

Job description

SpaceX is seeking a Principal Design Verification Engineer for silicon engineering to lead digital ASIC/FPGA verification from block to system level. You will drive verification test plans and milestones, contribute to pre-silicon and post-silicon validation, and be a hands-on engineer executing complex verification tasks.

You will collaborate with cross-disciplinary teams and work on cutting-edge ASICs for Starlink, enabling global connectivity and space infrastructure.