Lead ASIC & FPGA Verification Engineer

SpaceX; Union Hill-Novelty Hill (WA); On-site; USD 210,000 - 335,000; Full time

Job summary

SpaceX is seeking a Principal Design Verification Engineer (Silicon Engineering) to lead digital ASIC/FPGA verification efforts for Starlink and space-grade hardware. You will drive verification strategies, develop test plans, and collaborate with cross-disciplinary teams to ensure robust pre- and post-silicon validation of complex digital designs.

The role requires strong debugging skills, expertise in HDL verification, and the ability to perform under tight schedules in a dynamic space tech

Qualifications

• Bachelor's degree in electrical engineering, computer engineering, or computer science.
• 10+ years of experience with design verification and test bench development.
• Advanced degree in electrical engineering or computer engineering.
• Experience with verification methodologies such as UVM/OVM/VMM.
• Strong object-oriented programming knowledge.
• Strong problem-solving and coding skills.
• Experience in constrained random verification.
• Developing test plans, implementing coverage models, and analyzing results.
• RTL design, chip bring-up, and post-silicon validation experience.
• Ability to work in a dynamic environment with changing needs and requirements.

Responsibilities

• Responsible for digital ASIC and/or FPGA verification at block and system level
• Lead and execute verification test plan, development, and milestones from beginning to end
• Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
• Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

Skills

UVM/OVM/VMM verification

Object-oriented programming

Constrained random verification

Test plans & coverage models

Python scripting

RTL design and post-silicon validation

Dynamic environment adaptability

Education

Bachelor's degree in EE/CE/CS

Advanced degree in EE/CE

Tools

Python

Job description

SpaceX is seeking a Principal Design Verification Engineer (Silicon Engineering) to lead digital ASIC/FPGA verification efforts for Starlink and space-grade hardware. You will drive verification strategies, develop test plans, and collaborate with cross-disciplinary teams to ensure robust pre- and post-silicon validation of complex digital designs.

The role requires strong debugging skills, expertise in HDL verification, and the ability to perform under tight schedules in a dynamic space tech