Senior Digital Verification Lead - ASIC/FPGA

SpaceX; Austin (TX); On-site; USD 180,000 - 240,000; Full time

Job summary

SpaceX is seeking a Principal Design Verification Engineer (Silicon Engineering) to lead digital ASIC/FPGA verification across block and system levels for Starlink hardware. You will drive verification plans, run pre- and post-silicon validation, and collaborate with cross-disciplinary teams on complex digital designs.

Applicants should have a strong background in verification methodologies, object-oriented programming, and scripting, with the ability to work in a fast-paced, milestone-driven

Qualifications

• Bachelor’s degree in electrical engineering, computer engineering, or computer science.
• 10+ years of experience with design verification and test bench development.
• Experience with verification methodologies such as UVM/OVM/VMM.

Responsibilities

• Responsible for digital ASIC and/or FPGA verification at block and system level.
• Lead and execute verification test plan, development, and milestones from beginning to end.
• Contribute towards pre-silicon verification, chip bring‑up and post-silicon validation.
• Be a hands‑on self‑starter who can execute the steps required to fully verify a complex digital designs.

Skills

ASIC verification

Test bench

UVM/OVM/VMM

OOP programming

Python scripting

Constrained random

Test plans & coverage

RTL bring-up

Education

Bachelor’s degree in EE/CE/CS

Advanced degree in EE/CE

Tools

Python

Job description

SpaceX is seeking a Principal Design Verification Engineer (Silicon Engineering) to lead digital ASIC/FPGA verification across block and system levels for Starlink hardware. You will drive verification plans, run pre- and post-silicon validation, and collaborate with cross-disciplinary teams on complex digital designs.

Applicants should have a strong background in verification methodologies, object-oriented programming, and scripting, with the ability to work in a fast-paced, milestone-driven