Senior Digital Design Architect for SoC & IP

Microchip Technology Inc; Chandler (AZ); On-site; USD 75,000 - 232,000; Full time

Benefits offered by this job

Health benefits from day one

ESPp program with 2 year look back

Job summary

Microchip Technology Inc in Chandler, AZ is seeking a Principal Digital Design Engineer to lead RTL design, integration, and signoff verification for mixed-signal microcontrollers. This hands-on role spans architecture, verification, and cross-functional collaboration with analog, product and test teams.

Responsibilities include owning digital blocks from concept to tape-out, developing Verilog/SystemVerilog blocks, and guiding SoC verification, floorplanning, and power-aware design.

Qualifications

• B.S. in Electrical or Computer Engineering or related field with 10+ years' experience in ASIC/SoC Digital Design and Verification.
• Strong foundations in digital logic, finite state machine design, computer architecture, RTL coding, and SoC integration techniques.
• Familiarity with industry EDA flows/tools (Cadence, Synopsys, Siemens), Linux and Windows.
• Scripting skills (Python/Perl/Tcl) for productivity and flow automation.

Responsibilities

• Own and drive digital block and subsystem design from concept through tape-out, partnering with architects and system engineers on definition and requirements.
• Develop high-quality RTL (Verilog/SystemVerilog) for digital peripherals and IP (8/32-bit blocks).
• Lead block- and SoC-level verification and integration, including digital verification, UPF/low-power, AMS/mixed-signal collaboration, STA, and ECO support with PD teams.
• Provide technical leadership via design reviews, documentation, debug leadership, and project planning.
• Collaborate with analog design, architecture, product and test engineering to ensure silicon and product success.

Skills

ASIC/SoC Design

RTL Verification

Digital Architecture

Scripting (Python/Perl/Tcl)

Education

B.S. in Electrical/Computer Engineering or related field

M.S. in Electrical/Computer Engineering (pref)

Tools

Cadence

Synopsys

Siemens

Job description

Microchip Technology Inc in Chandler, AZ is seeking a Principal Digital Design Engineer to lead RTL design, integration, and signoff verification for mixed-signal microcontrollers. This hands-on role spans architecture, verification, and cross-functional collaboration with analog, product and test teams.

Responsibilities include owning digital blocks from concept to tape-out, developing Verilog/SystemVerilog blocks, and guiding SoC verification, floorplanning, and power-aware design.