Senior IP/SoC Verification Architect

Microchip-Technology; Chandler (AZ); Vor Ort; USD 150.000 - 190.000; Vollzeit

Zusammenfassung

Microchip Technology Inc. in Chandler, AZ is seeking a Principal Engineer – Verification to lead IP-level verification for dsPIC products using formal verification and UVM testbenches, collaborating with global teams to ensure high-quality results.

You will architect and maintain verification environments, develop SystemVerilog assertions, drive coverage, debug issues, mentor engineers, and push automation using AI/ML to shorten verification cycles, delivering on schedule.

Qualifikationen

• Bachelor’s or master’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or related field.
• 10+ years of functional verification experience.
• Strong expertise in SystemVerilog, UVM, and formal verification.
• Experience building IP-level and SoC-level verification environments.
• Solid RTL design knowledge and ARM/RISC architectures.

Aufgaben

• Architect, develop, and maintain UVM verification environments and Formal verification environments.
• Define verification plans and implement constrained-random UVM Testbench and/or Formal Testbench.
• Develop assertions and coverage in SystemVerilog language, analyze coverage metrics, and drive coverage closure.
• Debug RTL and testbench issues, perform root cause analysis, and collaborate with design and architecture teams to resolve defects.
• Collaborate with SoC development teams to integrate IP-level testbenches and tests into SoC-level verification environments.
• Collaborate with architects, designers, and applications teams to verify IP and product requirements and deliver quality results on schedule.
• Provide technical support and mentoring to verification engineers and drive projects to completion on schedule.
• Continuously improve verification methodologies by leveraging AI/ML automation to reduce the cycle time of verification.

Kenntnisse

SystemVerilog

UVM

Formal verification

IP-level verification

SoC verification

RTL fundamentals

ARM/RISC architectures

Communication

Mentoring

Constrained-random testing

Ausbildung

Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering

Jobbeschreibung

Microchip Technology Inc. in Chandler, AZ is seeking a Principal Engineer – Verification to lead IP-level verification for dsPIC products using formal verification and UVM testbenches, collaborating with global teams to ensure high-quality results.

You will architect and maintain verification environments, develop SystemVerilog assertions, drive coverage, debug issues, mentor engineers, and push automation using AI/ML to shorten verification cycles, delivering on schedule.