Principal Engineer-Design

Microchip Technology Inc; Chandler (AZ); On-site; USD 75,000 - 232,000; Full time

Benefits offered by this job

Health benefits from day one

ESPp program with 2 year look back

Job summary

Microchip Technology Inc in Chandler, AZ is seeking a Principal Digital Design Engineer to lead RTL design, integration, and signoff verification for mixed-signal microcontrollers. This hands-on role spans architecture, verification, and cross-functional collaboration with analog, product and test teams.

Responsibilities include owning digital blocks from concept to tape-out, developing Verilog/SystemVerilog blocks, and guiding SoC verification, floorplanning, and power-aware design.

Qualifications

• B.S. in Electrical or Computer Engineering or related field with 10+ years' experience in ASIC/SoC Digital Design and Verification.
• Strong foundations in digital logic, finite state machine design, computer architecture, RTL coding, and SoC integration techniques.
• Familiarity with industry EDA flows/tools (Cadence, Synopsys, Siemens), Linux and Windows.
• Scripting skills (Python/Perl/Tcl) for productivity and flow automation.

Responsibilities

• Own and drive digital block and subsystem design from concept through tape-out, partnering with architects and system engineers on definition and requirements.
• Develop high-quality RTL (Verilog/SystemVerilog) for digital peripherals and IP (8/32-bit blocks).
• Lead block- and SoC-level verification and integration, including digital verification, UPF/low-power, AMS/mixed-signal collaboration, STA, and ECO support with PD teams.
• Provide technical leadership via design reviews, documentation, debug leadership, and project planning.
• Collaborate with analog design, architecture, product and test engineering to ensure silicon and product success.

Skills

ASIC/SoC Design

RTL Verification

Digital Architecture

Scripting (Python/Perl/Tcl)

Education

B.S. in Electrical/Computer Engineering or related field

M.S. in Electrical/Computer Engineering (pref)

Tools

Cadence

Synopsys

Siemens

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

We're looking for a highly motivated, creative Principal Digital Design Engineer to join our engineering team and lead development of digital IP and SoC-level integration for mixed-signal microcontrollers. This is a hands-on role spanning RTL design, integration, and signoff verification-with broad cross-functional exposure to analog, architecture, validation/test, and product teams.

Key Responsibilities:

• Own and drive digital block and subsystem design from concept through tape-out, partnering with architects and system engineers on definition and requirements
• Develop high-quality RTL (Verilog / System Verilog) for digital peripherals and IP (8/32-bit class blocks), emphasizing robust, reusable design
• Lead block- and SoC-level verification and integration, including:
  • Digital verification (simulation/regressions, assertions/coverage)
  • UPF / low-power intent integration and verification
  • AMS / mixed-signal verification collaboration with analog teams
  • Static Timing Analysis (STA) support and closure coordination
  • Power and IR analysis and support with implementation/signoff teams
  • Physical Design / APR (Place & Route) collaboration and signoff support, including synthesis handoff, floorplanning awareness, timing/DRC/LVS closure coordination, and ECO support with PD teams
• Provide technical leadership via design reviews, documentation, debug leadership, and project planning
• Collaborate closely with analog design, architecture, product and test engineering, applications, and marketing to ensure silicon and product success

Requirements/Qualifications:

• B.S. in Electrical Engineering, Computer Engineering, or related field with 10+ years' experience in ASIC/SoC Digital Design and Verification
• Strong foundations in digital logic / finite state machine design, computer architecture, RTL coding, and SoC integration techniques
• Working knowledge of Physical Design / APR concepts and flows (synthesis, floorplanning, place-and-route, CTS, ECO), and ability to partner effectively with PD teams on timing/power/DFM closure
• Familiarity with industry EDA flows / tools (Cadence, Synopsys, Siemens), Linux, Windows
• Scripting skills (Python / Perl / Tcl) for productivity and flow automation
• Excellent debug, analytical thinking, and clear communication skills; comfortable driving alignment across teams
• Thrives in a team-oriented, fast-paced environment with a strong ownership mindset and continuous learning attitude

Preferred qualification:

• M.S. in Electrical Engineering, Computer Engineering, or related field

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking

Physical Requirements:

80% sitting, 10% walking, 10% standing

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.

Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position, which could be performed in the US, is $75,000- $232,000.*

*Range is dependent on numerous factors including job location, skills and experience.

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.