Senior DfT Engineer - RTL, ATPG & Chip Testability

NXP Semiconductors; Chandler (AZ); On-site; USD 120,000 - 160,000; Full time

Job summary

NXP Semiconductors in Chandler, AZ is seeking a Senior DfT Engineer to join a seasoned team. You will define DfT requirements with cross-functional leads, insert DfT into analog/mixed-signal IPs and complex digital logic, and ensure high-quality RTL and DV coverage.

You will drive verification plans, write tests, and assist test engineers during silicon bring-up and field issues. The ideal candidate holds a Master’s in Electrical Engineering with 3+ years in DfT or digital design, is able to

Qualifications

• Master's degree in Electrical Engineering or related field.
• 3+ years in DfT, digital design or architecture.
• Willing to relocate to the Phoenix Metro area and be present 3 days/week at the Chandler office.
• Strong problem solving, teamwork, planning and communication skills.

Responsibilities

• Collaborate with Product Definer, Analog/Digital Design Leads, Test Lead and others to define DfT requirements for chip blocks (functional mode, debug mode, ATPG).
• Research and apply DfT techniques for analog/mixed-signal IPs, macros, and complex digital logic.
• Contribute to RTL quality using Verilog/SystemVerilog and DV planning for chip-top verification.
• Define and execute Verification Plan for implemented features; create tests and debug to pass DV flows.

Skills

Verilog

SystemVerilog

RTL design

DfT design

Digital verification

Debugging

Communication skills

Education

Master's degree in Electrical Engineering

Job description

NXP Semiconductors in Chandler, AZ is seeking a Senior DfT Engineer to join a seasoned team. You will define DfT requirements with cross-functional leads, insert DfT into analog/mixed-signal IPs and complex digital logic, and ensure high-quality RTL and DV coverage.

You will drive verification plans, write tests, and assist test engineers during silicon bring-up and field issues. The ideal candidate holds a Master’s in Electrical Engineering with 3+ years in DfT or digital design, is able to