Senior DFT Engineer - Automotive RTL & Test

NXP Semiconductors; Austin (TX); On-site; USD 120,000 - 160,000; Full time

Job summary

NXP Semiconductors is seeking a DFT Engineer to join the MMDE BU, focusing on automotive Processing, Edge Processing and Radar Processing projects. You will implement and verify DFT architectures, including scan designs, JTAG, memory BIST and ATPG, collaborating with RTL and test teams.

Responsibilities cover RTL changes, MBIST insertion, ATPG pattern generation, DFT flow integration, and regression management across wafer probe and final test environments.

Qualifications

• 5+ years of experience in DFT implementation and verification of scan architectures, JTAG, memory BIST, ATPG.

Responsibilities

• Handle RTL design for DFT changes at subsystem and top levels.
• Insert MBIST RTL for memories and verify them.
• Analyze Scan DRCs and fix RTL accordingly.
• Analyze ATPG reports for coverage and improve it; generate patterns for ATE.
• Insert TAP, IOs, Test Pinmux using DFT flows.
• Perform power-aware RTL/GLS simulations and manage regression suites for Non-ATPG & ATPG tests.
• Bring up patterns on wafer probe and final test with Product & Test teams.

Skills

DFT implementation

ATPG

JTAG

Memory BIST

Scan architectures

Verilog/VHDL

Tools

Verilog

VHDL

Job description

NXP Semiconductors is seeking a DFT Engineer to join the MMDE BU, focusing on automotive Processing, Edge Processing and Radar Processing projects. You will implement and verify DFT architectures, including scan designs, JTAG, memory BIST and ATPG, collaborating with RTL and test teams.

Responsibilities cover RTL changes, MBIST insertion, ATPG pattern generation, DFT flow integration, and regression management across wafer probe and final test environments.