Senior DFT & ATPG Engineer for SoC/ASIC

Talent on Staffing; California (MO); On-site; USD 120,000 - 180,000; Full time

Job summary

Talent on Staffing is seeking a Senior DFT/ATPG Engineer to join our semiconductor team in the United States. You will design and verify DFT and ATPG for SoC/ASIC designs, focusing on controllability, observability, and scan-based testing.

The ideal candidate has hands-on experience, MBIST memory test architectures, IO test methodologies, clock DFT, RTL fundamentals, and proficiency with industry EDA tools, plus strong analytical and communication skills.

Qualifications

• Hands-on experience in designing and verifying DFT/ATPG for SoC/ASIC designs.
• Strong understanding of controllability, observability, and scan-based testing.
• Experience with ATPG pattern generation, analysis and debug.
• MBIST knowledge including memory test architectures and diagnostics.
• IO test methodologies for interface and pin level validation.
• Clock DFT and clock verification concepts; RTL fundamentals.

Skills

DFT/ATPG experience

Clock DFT concepts

RTL/digital design fundamentals

Analytical thinking

Communication skills

Fast-paced semiconductor programs

Tools

DFT/ATPG EDA tools

MBIST architectures

IO test methodologies

Job description

Talent on Staffing is seeking a Senior DFT/ATPG Engineer to join our semiconductor team in the United States. You will design and verify DFT and ATPG for SoC/ASIC designs, focusing on controllability, observability, and scan-based testing.

The ideal candidate has hands-on experience, MBIST memory test architectures, IO test methodologies, clock DFT, RTL fundamentals, and proficiency with industry EDA tools, plus strong analytical and communication skills.