Senior DFT Methodology Engineer: RTL & SoC Architect

NVIDIA Gruppe; Santa Clara (CA); On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Hybrid work model

Equity

Job summary

NVIDIA seeks a Senior DFT Methodology Engineer to architect and develop test methodologies for next-generation silicon, ensuring testability, debugability, and security from bring-up. You will collaborate across RTL, timing, physical design, software, and production to balance cost and quality.

The role requires 10+ years in SoC architecture, RTL design, and verification with strong scripting skills and a drive to mentor others.

Qualifications

• BS/MS Electrical or Computer Engineering (or equivalent experience) with proven DFT experience.
• 10+ years of hands-on experience in SoC architecture, RTL design, and verification.
• Strong analytical skills with experience using vendor tools to verify and validate test patterns on complex designs.
• Exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power.

Responsibilities

• Own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms and DFX security methodology.
• Partner with timing, physical design, software, bring-up, and production teams to trade off cost and quality.
• Architect, develop and deploy DFT methodologies for RTL design, verification, pattern generation with multiple teams.
• Mentor junior engineers on test designs and trade-offs including cost and quality.

Skills

SoC architecture

RTL design

Verification

Cross-functional collaboration

Education

BS/MS Electrical or Computer Engineering

Tools

Perl

Python

Tcl

Job description

NVIDIA seeks a Senior DFT Methodology Engineer to architect and develop test methodologies for next-generation silicon, ensuring testability, debugability, and security from bring-up. You will collaborate across RTL, timing, physical design, software, and production to balance cost and quality.

The role requires 10+ years in SoC architecture, RTL design, and verification with strong scripting skills and a drive to mentor others.