Senior DDR6 Memory Verification Architect

Renesas Electronics Corporation; Duluth (GA); On-site; USD 150,000 - 190,000; Full time

Benefits offered by this job

Medical benefits

Dental and vision

401(k) match

Paid time off

Relocation assistance

Job summary

Renesas Electronics Corporation in Duluth, GA seeks a Senior Staff Design Verification Engineer to lead verification for memory interfaces such as DDR6 for data center, AI, and cloud applications. You will drive verification strategy and develop SystemVerilog/UVM environments with a focus on high-quality, verifiable silicon.

The role demands 10+ years in semiconductor verification, deep expertise in verification methodologies, and strong mentoring abilities to guide engineers across projects.

Qualifications

• Bachelor's or Master's degree in Electrical/Computer Engineering or related field.
• 10+ years in semiconductor design verification.
• Deep experience in semiconductor design verification with leadership.
• Strong SystemVerilog and UVM proficiency.
• Experience defining verification strategies and plans.
• Strong debugging, coverage, and test development skills.

Responsibilities

• Provide technical leadership for verification of complex semiconductor designs at the block and system level.
• Define and drive verification strategies, methodologies, test plans, and coverage approaches for complex designs and features.
• Lead the development and optimization of SystemVerilog/UVM verification environments and testbenches.
• Drive verification execution, functional coverage, debugging, and coverage closure.
• Take ownership of significant verification efforts and make independent technical decisions on methods, techniques, and priorities.
• Collaborate with design engineers and stakeholders to ensure designs meet requirements and are verifiable.
• Analyze issues, determine root causes, and drive solutions.
• Improve verification methodologies, processes, and efficiency.
• Develop reusable verification solutions and best practices for broader engineering use.

Skills

SystemVerilog

UVM

Technical leadership

Verification strategy

DDR memory experience

Mentoring

Education

Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or related field

Job description

Renesas Electronics Corporation in Duluth, GA seeks a Senior Staff Design Verification Engineer to lead verification for memory interfaces such as DDR6 for data center, AI, and cloud applications. You will drive verification strategy and develop SystemVerilog/UVM environments with a focus on high-quality, verifiable silicon.

The role demands 10+ years in semiconductor verification, deep expertise in verification methodologies, and strong mentoring abilities to guide engineers across projects.