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Renesas Electronics is seeking a Technical Leader to own the architecture and design of DDR5 PHYs and contribute to DDR6-ready architectures. You will guide high-speed datapaths, equalization, and clocking, while driving post-silicon validation and reliability efforts.
A strong background in analog/mixed-signal IC design and leadership is essential. The role requires 12+ years in memory interfaces, with a track record of delivering complex DDR PHY projects and leading teams towards execution
Renesas Electronics is seeking a Technical Leader to own the architecture and design of DDR5 PHYs and contribute to DDR6-ready architectures. You will guide high-speed datapaths, equalization, and clocking, while driving post-silicon validation and reliability efforts.
A strong background in analog/mixed-signal IC design and leadership is essential. The role requires 12+ years in memory interfaces, with a track record of delivering complex DDR PHY projects and leading teams towards execution