Senior Custom IC Design & Verification Engineer

SNAP, Inc.; United States; On-site; USD 147,000 - 259,000; Full time

Benefits offered by this job

Equity in RSUs

Competitive benefits

Job summary

Snap Inc. is seeking a Custom IC Layout Engineer to join the MicroDisplay Electronics team at SPECS. You will craft layout for analog and mixed-signal circuits and collaborate with digital, analog, and layout engineers to meet performance and area goals.

You’ll automate flows with scripting, participate in floor planning and tape-out verification, and contribute to design reviews and parasitic extraction to drive device quality and efficiency.

Qualifications

• BSEE or relevant years of experience.
• 5+ years in directly applicable work performing custom layout.

Responsibilities

• Design display ICs for AR as part of a multi-disciplinary team.
• Perform cell and block layout of Analog and Mixed-Signal circuits to meet design rules and performance.
• Create reusable scripts to automate design flow and improve efficiency.
• Support IC floor planning and place & route of full-chip digital designs with IP.
• Prepare design documentation for internal reviews.
• Execute parasitic extraction and iterate design improvements.

Skills

Custom layout knowledge

Cadence Virtuoso

Calibre tool suite

Scripting (Python, Tcl, Perl)

Tape-out verification (DRC/ERC/LVS)

Signal integrity and layout effects

ASIC/IC design experience

Education

BSEE or equivalent experience

Tools

Cadence Virtuoso

Mentor/Siemens Calibre

Job description

Snap Inc. is seeking a Custom IC Layout Engineer to join the MicroDisplay Electronics team at SPECS. You will craft layout for analog and mixed-signal circuits and collaborate with digital, analog, and layout engineers to meet performance and area goals.

You’ll automate flows with scripting, participate in floor planning and tape-out verification, and contribute to design reviews and parasitic extraction to drive device quality and efficiency.